The present invention relates in general, to electronics, and more particularly though not exclusively, to semiconductors, structures thereof, and methods of forming semiconductor devices.
Two major parameters which are important to the high voltage power switch market are breakdown voltage (BV) and on-state resistance (RS). In typical systems a high breakdown voltage is desired. However, this is often at the expense of high RS. A trade-off in performance which accompanies balancing a high breakdown voltage and a high RS is a major design challenge for manufacturers of high voltage power switching devices. An edge termination structure that surrounds a semiconductor device, aids in the reduction of electric fields at the edge of the semiconductor device (edge electric fields). Common edge termination structures are based upon floating rings and field plates, where the edge electric fields reduce the voltage at the edge of the semiconductor device to about fifty to eighty percent (50%-80%) of the voltage without such edge termination structures.
Recently, superjunction Global Charge Balance (GCB) termination devices have gained in popularity to improve the trade-off in performance when balancing desirable RS and BV values in a semiconductor device. FIG. 1 illustrates a common GCB termination structure. In the structure illustrated multiple heavily-doped diffused N-type (130) and P-type (120) pillars replace one lightly doped N-type epitaxial region. In the on state, current flows through the heavily doped N-type region (130), which lowers RS. In the off or blocking state, the heavily doped N-type (130) and P-type (120) pillars deplete into or compensate each other to provide a larger BV than a BV associated with the N-type epitaxial region alone. The termination area 102 and a region 103 of a semiconductor device 100 are illustrated in FIG. 1. An edge termination structure 105, includes P-type (120) and N-type (130) pillars, facilitating charge depletion across the termination structure 105. The edge termination structure 105 includes an N-channel stopper region 140 which is connected electrically via an N+ contact region 111 to an N+ drain contact region 110. Typical GCB based semiconductor devices have termination areas with a length dimension extending from the active region to an edge of the semiconductor device which generally is greater than about 200 μm. The larger the termination area and the length thereof, the larger the semiconductor device will be. Hence if the termination area can be reduced while maintaining a low edge electric field, the semiconductor device can be reduced in size.
FIG. 2 illustrates a semiconductor device 200 including a region 203 and a Local Charge Balance (LCB) structure. The LCB edge termination structure 205 utilizes a wide oxide filled trench 260 adjacent to N-type (220) and floating P-type (230) pillars in a lightly doped epitaxial layer 210 deposited on an N+ drain contact region 250. The LCB edge termination structure 205 includes the lightly doped epitaxial layer 210, which the GCB method replaced with N-type (130) and P-type (120) doped pillars. The lowly doped epitaxial layer 210 (<1×1014 cm−3) in LCB edge termination structures, facilitates rapid charge depletion and higher BV. However, when the length of the termination area, as measured from the edge of the active region 209 to the edge 207 of the semiconductor device 200, is reduced, the depletion region reaches the semiconductor edge, resulting in higher edge electric fields, which can damage connected devices. Thus the length of the termination area (termination length) would have to be increased to reduce edge electric fields, increasing the resultant semiconductor device size.
Some systems additionally use multi-ring termination structures in epitaxial layer 210. In multi-ring termination structures the depletion spreads slowly as each ring depletes, thus requiring 6 to 12 rings, resulting in a long termination length to achieve the desired BV.
Accordingly, an edge termination structure is needed that has a reduced termination area while minimizing edge electric fields at the edge of the semiconductor device. Additionally, an edge termination structure is needed that provides lower RS, and a high BV.